American chip maker, Nvidia has announced that its new single-chip self-driving processor christened ‘Drive Xavier system-on-chips (SoC)’ has got safety approval from German testing and certification expert TUV SUD.
Nvidia claims that safety is designed into the Nvidia Drive computer for autonomous vehicles from the ground up. The experts architect safety technology into every aspect of its computing system, from the hardware to the software stack, tools and methods are being developed to create software’s that perform as intended, reliably and with backups.
“Nvidia Xavier is one of the most complex processors we have evaluated,” said Axel Kohnen, Xavier lead assessor at TUV SUD RAIL. “Our in-depth technical assessment confirms the Xavier SoC architecture is suitable for use in autonomous driving applications and highlights the company’s commitment to enable safe autonomous driving.”
The American company states that Xavier is the most complex SoC ever created, it is equipped with 9 billion transistors, which enable it to process vast amounts of data. The GMSL (gigabit multimedia serial link) high-speed IO connects Xavier to the largest array of LiDAR, radar and camera sensors of any chip ever built. On the inside of the SoC it is equipped with six types of processors — ISP (image signal processor), VPU (video processing unit), PVA (programmable vision accelerator), DLA (deep learning accelerator), CUDA GPU, and CPU — that process nearly 40 trillion operations per second, 30 trillion for deep learning alone. It claims this level of processing is 10 times more powerful than its previous generation DRIVE PX 2 reference design, which is being currently used in most advanced production cars.
Inside the Xavier SoC — six types of processors, processes nearly 40 trillion operations per second.
From a safety perspective, the company states the development of Xavier meant incorporating diversity, redundancy and fault detection from end to end. From sensors, to specialised processors, to algorithms, to the computer, all the way to the car’s actuation — each function is performed using multiple methods, which provides diversity. And each vital function has a fallback system to ensure redundancy.
For instance, objects detected by radar, LiDar or cameras are handled with different processors and perceived using a variety of computer vision, signal processing and point cloud algorithms. Multiple deep learning networks run concurrently to recognise objects that should be avoided, while other networks determine where it’s safe to drive, achieving both diversity and redundancy. Different processors, running diverse algorithms in parallel, backing each other up, reduce the chance of an undetected single point of failure.
Nvidia states Xavier also incorporates many types of hardware diagnostics, including key areas of logic which are duplicated and voted in hardware using lockstep comparators. Error-correcting codes on memories detect faults and improve availability, along with a unique built-in self-test helps to find faults in the diagnostics, wherever they may be on chip.
The company claims that Xavier’s safety architecture was created over several years by more than 300 architects, designers and safety experts who analysed over 150 safety-related modules. With Xavier, the auto industry can achieve the highest functional safety rating: ASIL-D.
Measuring up to the highest standards
Nvidia states that ‘Drive’ being an open platform enables experts in the world’s best car companies to engage on the platform to make it more powerful, along with involving TUV SUD, among the world’s most respected safety experts, who measured Xavier against the automotive industry’s standard for functional safety — ISO 26262.
Established by the International Organization for Standardisation, ISO 26262 is the definitive global standard for the functional safety — a system’s ability to avoid, identify and manage failures — of road vehicles’ systems, hardware and software.
The company states to meet that standard, an SoC must have an architecture that doesn’t just detect hardware failures during operation. It also needs to be developed in a process that mitigates potential systematic faults. That is, the SoC must avoid failures whenever possible, but detect and respond to them if they cannot be avoided. TUV SUD’s team determined Xavier’s architecture meets the ISO 26262 requirements to avoid unreasonable risk in situations that could result in serious injury.
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